Stefan Steinegger

Dipl.-Ing. BSc

Secure Systems, PhD Student

Stefan Steinegger is a PhD student of Stefan Mangard in the Secure Systems (SESYS) group at the Institute of Applied Information Processing and Communications (IAIK) in Graz, Austria. He graduated to Dipl.Ing. (MSc) from the University of Technology Graz in 2018. His master's thesis is about power side-channel attacks and defenses for hardware implementations of a cryptographic scheme called BLISS.
Stefan Steinegger


My research interests include secure processor designs in Hard- and Software for RISC-V as well as side-channel attacks and defenses.


I teach a graduate course that focuses on designing and implementing hardware and software for embedded systems with focus on a different topic each year.

  • System-on-Chip Architectures and Modelling (lecture: winter term)