VLSI Design Practical
The Konstruktionsübung is an essential part of VLSI Design. It is recommended to visit KU and VO of VLSI Design in the same semester.
Content
The practical lab of VLSI Design covers the design of a digtal integrated circuit. During the work the following tasks have to be accomplished:
- System-level specification
- Algorithmic evaluation
- Architectrual choices
- Register-level transfer modelling (VHDL, Verilog)
- Dynamic functional verification (HDL simulation)
- Synthesis
- Place & Route
- Back-end verification
The practical work is committed with professional CAD tools -- mostly from Cadence that are used in industry too. The outcome of the lab is the layout of a CMOS circuit that is nearly suitable for tape-out (production).
Organizational things
Groups. The VLSI-Design KU is done in groups of three. Look out for a group early.
Computers, Accounts, Software, Design flow. For the duration of the Konstruktionsübung, participants have access to the VLSI workstation located at IAIK via an account for the group (vlsiku_gg). For more information about the infrastructure have a look at http://www.student.iaik.tugraz.at/.
Communication. Relevant info about the Konstruktionsübung will be published in the Newsgroup tu-graz.lv.vlsi-design. Please monitor this newsgroup throughout the semester. Questions and discussions are welcome there.
Exams. The Konstruktionsübung is a team work of three students. The final submission of deliverables is graded during a colloquium / discussion.
This year's VLSI practical
| Title | Download | |
|---|---|---|
 |
Assignment presentation for SS2012 | Download |
|
IAIK design-flow presentation | Download |
Previous VLSI practicals
| Year | Topic | Download | |
|---|---|---|---|
|
2011 | Low-Resource Block Ciphers | Download |
|
2010 | SHA-3 Hash Competition - Part 2 | Download |
|
2009 | SHA-3 Hash Competition | Download |
|
2008 | SHA-1 Low-Power Module | Download |
|
2007 | RSA-2048 Implementation | Download |
|
2006 | Analysis of Stream Ciphers | Download |
|
2005 | Digital RFID Controller | Download |
|
2004 | Digital RFID Transceiver | Download |
|
2003 | High-speed Montgomery Multiplication | Download |
|
2002 | High-speed Finite-Field Arithmetic | Download |
News
| Date | Title |
|---|---|
| 13.03.2012 | Presentation of the Assignment for SS2012 (8:30 IAIK SR). |
| 24.04.2012 | Presentation of IAIK design flow (8:30 IAIK SR). |
Timetable
Note that the meetings for the practicals start earlier than the lecture (Tue 8:30-10:45)
View timetable »
Title: VLSI Design
Course-Number: 705.043
Lecturer: Thomas Plos
E-Mail: Thomas.Plos@iaik.tugraz.at
Newsgroup: tu-graz.lv.vlsi-design
TUG-Online: TUG-Online
Downloads
The slides of the assignment presentation and a small introduction to the IAIK design flow are available for download.
View downloads »