Thomas Popp received a Dipl.-Ing. degree (equivalent to M.Sc.) in computer science ("Telematik") from Graz University of Technology, Austria. He joined the team at IAIK in 2004 and is currently working towards his PhD degree in the field of side-channel attacks on cryptographic devices and related countermeasures.
| Year |
Project |
| 2007 |
Mario Ackerl, "Primality Test in Hardware", Master Level SS07 |
| 2006 |
Christian Neureiter, "SCARD Test Board", Master Level SS06 |
| 2005 |
Joachim Lechner, Markus Tatzgern, "Crypto Cracking Suite", Master Level (Projektsemester) WS05/06 |
| 2005 |
Johannes Anderwald, Reinhard Fellner, "Cracking WEP", Bachelor Level SS05 |
| 2004 |
Vedran Bauer, Florian Plank, Tobias Vejda, "HDL Power Trace Estimation", Master Level (Projektsemester) WS04/05 |
| 2004 |
Christoph Bouvier, Michael Steinkogler, "WEP Attack", Master Level (Projektsemester) WS04/05 |
| Proceedings |
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| 2010 |
Mario Kirschbaum, Thomas Popp, Oren Yossef, Avishai Wool - "Algebraic Side-Channel Analysis in the Presence of Errors" - Cryptographic Hardware and Embedded Systems - CHES 2010 (Note: to appear) |
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| 2009 |
Thomas Popp - "An Introduction to Implementation Attacks and Countermeasures" |
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| 2009 |
Thomas Popp, Mario Kirschbaum, Stefan Mangard - "Practical Attacks on Masked Hardware" - Topics in Cryptology - CT-RSA 2009, The Cryptographers' Track at the RSA Conference 2009 |
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| 2009 |
Mario Kirschbaum, Thomas Popp - "Evaluation of a DPA-Resistant Prototype Chip" - Twenty-Fifth Annual COMPUTER SECURITY APPLICATIONS Conference |
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| 2008 |
Martin Feldhofer, Thomas Popp - "Power Analysis Resistant AES Implementation for Passive RFID Tags" - Austrochip 2008 |
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| 2007 |
Mario Kirschbaum, Thomas Popp - "Evaluation of Power Estimation Methods Based on Logic Simulations" - Proceedings of the 15th Austrian Workshop on Microelectronics |
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| 2007 |
Thomas Popp, Mario Kirschbaum, Thomas Zefferer, Stefan Mangard - "Evaluation of the Masked Logic Style MDPL on a Prototype Chip" - Cryptographic Hardware and Embedded Systems - CHES 2007 |
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| 2006 |
Thomas Popp, Stefan Mangard - "Implementation Aspects of the DPA-Resistant Logic Style MDPL" - IEEE International Symposium on Circuits and Systems |
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| 2006 |
Manfred Josef Aigner, Thomas Popp, Stefan Mangard, Alessandro Trifiletti, Renato Menicocci, Mauro Olivieri, Giuseppe Scotti - "Side Channel Analysis Resistant Design Flow" - IEEE International Symposium on Circuits and Systems |
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| 2005 |
Thomas Popp, Stefan Mangard - "Masked Dual-Rail Pre-Charge Logic: DPA-Resistance without Routing Constraints" - Cryptographic Hardware and Embedded Systems - CHES 2005 |
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| 2005 |
Egon Valentini, Edmund Haselwanter, Robert Ulmer, Thomas Popp - "Configurable Logic Style Translation Based on an OpenAccess Engine" |
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| 2005 |
Stefan Mangard, Thomas Popp, Berndt M. Gammel - "Side-Channel Leakage of Masked CMOS Gates" - Topics in Cryptology - CT-RSA 2005, The Cryptographers' Track at the RSA Conference 2005, San Francisco, CA, USA, February 14-18, 2005, Proceedings |
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| 2003 |
Martin Feldhofer, Michael Groß, Johann Großschädl, Thomas Popp, Norbert Pramstaller, Christian Pühringer, Karl Scheibelhofer, Alexander Szekely, Stefan Tillich, Karl-Christian Posch - "Rapid Prototyping of a SPARC-V8-based Firewall-on-Chip" - Proceedings of Austrochip 2003, October 3, 2003, Linz, Austria |
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| 2002 |
Christian Rechberger, Thomas Popp, Stefan Tillich - "Low-cost AES" - Proceedings of Austrochip 2002, October 4, 2002, Graz, Austria |
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| Presentation |
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| 2010 |
Thomas Popp - "Masking at the Cell Level - A Hardware Countermeasure against Power Analysis Attacks for Cryptographic Devices" (Rigorosum, 05.03.10) |
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| 2009 |
Thomas Popp - "Practical Attacks on Masked Hardware" (Topics in Cryptology - CT-RSA 2009, The Cryptographers' Track at the RSA Conference 2009, CA, 22.04.09) |
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| 2009 |
Thomas Popp - "An Introduction to Implementation Attacks and Countermeasures" (ACM-IEEE International Conference on Formal Methods and Models for Codesign (MEMOCODE 2009), 14.07.09) |
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| 2008 |
Thomas Popp - "Power Analysis Resistant AES Implementation for Passive RFID Tags" (Austrochip 2008, Linz, 08.10.08) |
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| 2007 |
Thomas Popp - "DPA-Resistant Logic Styles - An Introduction" (ECRYPT Seminar, 22.03.07) |
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| 2007 |
Thomas Popp - "Evaluation of the Masked Logic Style MDPL on a Prototype Chip" (Workshop on Cryptographic Hardware and Embedded Systems - CHES 2007, Vienna, 11.09.07) |
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| 2006 |
Thomas Popp - "Implementation Aspects of the DPA-Resistant Logic Style MDPL" (IEEE International Symposium on Circuits and Systems - ISCAS 2006, Island of Kos, 23.05.06) |
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| 2006 |
Thomas Popp - "SCARD Logic Styles and Implementation" (Recent Results on Side-Channel Resistant Designs, Louvain-la-Neuve, 16.06.06) |
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| 2005 |
Thomas Popp - "Masked Dual-Rail Pre-Charge Logic: DPA-Resistance without Routing Constraints" (Cryptographic Hardware and Embedded Systems - CHES 2005, Edinburgh, 31.08.05) |
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| Tech report |
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| 2009 |
Mario Kirschbaum, Thomas Popp, Holger Bock, Raimondo Luzzi, Marco Bucci - "GRANDESCA D4.1 Analysis Results Report" |
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| 2008 |
Martin Feldhofer, Manfred Josef Aigner, Thomas Popp - "SNAP WP4 Test and Evaluation Report of AES Chips" |
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| 2008 |
Martin Feldhofer, Manfred Josef Aigner, Thomas Popp - "SNAP WP4 Architecture, Simulation, and Synthesis Report of SCA-Secure AES Module" |
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| 2008 |
Martin Feldhofer, Manfred Josef Aigner, Thomas Popp - "SNAP WP4 Evaluation of Low Power SCA Countermeasures " |
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| 2007 |
Mario Kirschbaum, Thomas Popp - "GRANDESCA D1.1 SCARD Chip Analysis Report" |
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| 2007 |
Mario Kirschbaum, Thomas Popp - "GRANDESCA D2.1 Encryption Module Specification" |
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| 2006 |
Manfred Roth, Manfred Josef Aigner, Thomas Popp, Thomas Zefferer, KURLD, URM1, Cryptovision TUBITAK, UCL, - "SCARD D7.3 - Final Report SCARD Chip" |
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| 2006 |
Martin Feldhofer, Manfred Josef Aigner, Thomas Popp - "SNAP SCA Requirements Specification for AES Implementation" |
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| 2005 |
Thomas Popp, Martin Feldhofer, Manfred Josef Aigner, Sandra Dominikus - "ART WP5 TINA Test-Chip - DPA Attack" |
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| 2005 |
Manfred Roth, Stefan Tillich, Manfred Josef Aigner, Thomas Popp, Stefan Mangard - "SCARD D7.1 Specification SCARD Chip" |
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| 2005 |
Manfred Josef Aigner, Thomas Popp, Stefan Mangard - "SCARD D2.4 Final Report Logic & Cell Library Development" |
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| 2005 |
Thomas Popp, Stefan Mangard, Manfred Josef Aigner - "SCARD D2.3 DPA Proof Logic Styles - Technical Report" |
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| 2005 |
Alessandro Trifiletti, Thomas Popp, Manfred Josef Aigner, Stefan Mangard, Lejla Batina - "SCARD D6.1 Final Report Modeling & Simulation of SCA Effects" |
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| 2005 |
Egon Valentini, Thomas Popp - "SCARD D5.5 Final Report EDA Framework Development" |
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| 2004 |
Manfred Josef Aigner, Stefan Mangard, Thomas Popp - "SCARD D1.2 Requirement Specification Report" |
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