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Institut für Angewandte Informationsverarbeitung und Kommunikationstechnologie
Inffeldgasse 16a/I, A-8010, Graz
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Mario Kirschbaum

Personal Data

Date and Place of Birth	March 19, 1981, Graz, Austria
Citizenship	Austrian
Languages	german, english

Education

Year	Activity
2011	Graduation to Dr. techn. (Ph.D.) at Graz University of Technology, Austria
2007 - 2011	Doctoral programme in Telematics at Graz University of Technology, Austria
2005 - 2007	Master's programme in Telematics at Graz University of Technology, Austria
2001 - 2005	Bachelor's programme in Telematics at Graz University of Technology, Austria
1995 - 2000	Technical college for electrical engineering in Graz-Gösting
1991 - 1995	Secondary school (BG/BRG Seebacher) in Graz
1987 - 1991	Primary school (VS Berliner Ring) in Graz

Experiences

Year	Activity
since 02/2007	Member of IAIK SEnSE group (former VLSI and Security)
08/2006 - 12/2006	Working in the field of side-channel attacks and power simulations at Infineon Technologies Austria at the development center Graz in the course of my master's thesis
2003 - 2006	Part time employee as technical assistant at Fresenius Kabi Austria
2001	Technical designer at LG-Philips Displays in Lebring
2000	Special training as medic during my military duty absolved
1999	Vacation job at Grazer Stadtwerke
1998	Vacation job at Computer Network & Communication GmbH (Conec) in Munich
1997	Vacation job at Grazer Stadtwerke

Publications

Proceedings
2012	Michael Hutter, Mario Kirschbaum, Thomas Plos, Jörn-Marc Schmidt, Stefan Mangard - *"Exploiting the Difference of Side-Channel Leakages"* - Constructive Side-Channel Analysis and Secure Design - COSADE 2012, 3rd International Workshop, Darmstadt, Germany, May 3-4, 2012, Proceedings. (Note: to appear)
2011	Mario Kirschbaum, Jörn-Marc Schmidt - *"Learning from Electromagnetic Emanations - A Case Study for iMDPL"* - Workshop Proceedings COSADE 2011
2011	Michael Hutter, Mario Kirschbaum, Thomas Plos, Jörn-Marc Schmidt - *"Test Apparatus for Side-Channel Resistance Compliance Testing"* - Non-Invasive Attack Testing Workshop - NIAT 2011, International Workshop, Nara, Japan, September 26-27, 2011.
2011	Stefan Tillich, Mario Kirschbaum, Alexander Szekely - *"Implementation and Evaluation of an SCA-Resistant Embedded Processor"* - Smart Card Research and Advanced Application (Note: to appear)
2010	Stefan Tillich, Alexander Szekely, Mario Kirschbaum - *"SCA-Resistant Embedded Processors - The Next Generation"* - Twenty-Sixth Annual COMPUTER SECURITY APPLICATIONS Conference
2010	Stefan Tillich, Martin Feldhofer, Mario Kirschbaum, Thomas Plos, Jörn-Marc Schmidt, Alexander Szekely - *"Hardware Implementations of the Round-Two SHA-3 Candidates: Comparison on a Common Ground"* - Proceedings of Austrochip 2010, Villach, Austria, October 6, 2010, Proceedings
2010	Stefan Tillich, Martin Feldhofer, Mario Kirschbaum, Thomas Plos, Jörn-Marc Schmidt, Alexander Szekely - *"Uniform Evaluation of Hardware Implementations of the Round-Two SHA-3 Candidates"* - The Second SHA-3 Candidate Conference, Santa Barbara, USA, August 23-24, 2010 (Note: to appear)
2010	Jörn-Marc Schmidt, Thomas Plos, Mario Kirschbaum, Michael Hutter, Marcel Medwed, Christoph Herbst - *"Side-Channel Leakage Across Borders"* - Smart Card Research and Advanced Applications 9th IFIP WG 8.8/11.2 International Conference, CARDIS 2010
2010	Oren Yossef, Mario Kirschbaum, Thomas Popp, Avishai Wool - *"Algebraic Side-Channel Analysis in the Presence of Errors"* - Cryptographic Hardware and Embedded Systems - CHES 2010
2009	Mario Kirschbaum, Thomas Popp - *"Evaluation of a DPA-Resistant Prototype Chip"* - Twenty-Fifth Annual COMPUTER SECURITY APPLICATIONS Conference
2009	Thomas Popp, Mario Kirschbaum, Stefan Mangard - *"Practical Attacks on Masked Hardware"* - Topics in Cryptology - CT-RSA 2009, The Cryptographers' Track at the RSA Conference 2009
2007	Thomas Popp, Mario Kirschbaum, Thomas Zefferer, Stefan Mangard - *"Evaluation of the Masked Logic Style MDPL on a Prototype Chip"* - Cryptographic Hardware and Embedded Systems - CHES 2007
2007	Mario Kirschbaum, Thomas Popp - *"Evaluation of Power Estimation Methods Based on Logic Simulations"* - Proceedings of the 15th Austrian Workshop on Microelectronics

Article
2011	Amir Moradi, Mario Kirschbaum, Thomas Eisenbarth, Christof Paar - *"Masked Dual-Rail Precharge Logic Encounters State-of-the-Art Power Analysis Methods"* - IEEE transactions on very large scale integration (VLSI) systems (Volume: PP)

Dissertation
2011	Mario Kirschbaum - *"Power Analysis Resistant Logic Styles - Design, Implementation, and Evaluation"*

Master thesis
2007	Mario Kirschbaum - *"Investigation of DPA-Resistant Logic Styles"*

Tech report
2011	Jörn-Marc Schmidt, Mario Kirschbaum, Auélien Francillon, Manu Sekar, Frank Vater, Steffen Peter - *"TAMPRES D1.2 Analysis of attacks on sensor nodes software and hardware"*
2010	Mario Kirschbaum, Alexander Szekely, Stefan Tillich - *"POWER-TRUST D3.4 Specification of hardware structures of test-chip 2"*
2010	Mario Kirschbaum, Alexander Szekely, Stefan Tillich - *"POWER-TRUST D4.1 Analysis Report of Test Chip 2 (IAIK)"*
2009	Mario Kirschbaum, Stefan Tillich, Alexander Szekely, Christoph Herbst, Holger Bock, Josef Haid - *"POWER-TRUST D2.2 Specification of countermeasures selected for Implementation"*
2009	Mario Kirschbaum, Thomas Popp, Holger Bock, Raimondo Luzzi, Marco Bucci - *"GRANDESCA D4.1 Analysis Results Report"*
2009	Mario Kirschbaum, Stefan Tillich, Alexander Szekely - *"POWER-TRUST D3.3 Description of Power-Efficient Software Countermeasures Including Hardware Support"*
2008	Joonsang Baek, Anton Kargl, Mario Kirschbaum, Hermann Seuschek, Han Chiang Tan, Stefan Tillich, Jun Wen Wong, Jianying Zhou - *"SMEPP D4.4 Power Estimation Methodology for Secure Algorithms and Protocols in Embedded Networks"*
2007	Mario Kirschbaum, Thomas Popp - *"GRANDESCA D1.1 SCARD Chip Analysis Report"*
2007	Mario Kirschbaum, Thomas Popp - *"GRANDESCA D2.1 Encryption Module Specification"*

Presentation
2011	Mario Kirschbaum - *"Learning from Electromagnetic Emanations - A Case Study for iMDPL"* (International Workshop on Constructive Side-Channel Analysis and Secure Design 2011, Darmstadt, 24.02.11)
2011	Mario Kirschbaum - *"Power Analysis Resistant Logic Styles - Design, Implementation, and Evaluation"* (PhD defense, 28.09.11)
2010	Mario Kirschbaum - *"A Glimpse on DPA-Resistant ASIC Prototypes"* (HGI Kolloquium - Aktuelle Themen der IT-Sicherheit, Horst Görtz Institut für IT-Sicherheit, 21.07.10)
2009	Mario Kirschbaum - *"Evaluation of a DPA-Resistant Prototype Chip"* (2009 Annual Computer Security Applications Conference, Honolulu, 07.12.09)
2007	Mario Kirschbaum - *"Evaluation of Power Estimation Methods Based on Logic Simulations"* (Austrochip 2007 - Workshop on Microelectronics, Graz, 11.10.07)